Syntax:

• IPUSHANDGE Rs3 BS3 Rs0 Rs1

Description:

The IPUSHANDGE operation is a single operation having the effect of an IPUSHGE operation followed by an SAND operation. Explicitly, the logical operations are as follows:

Stack before IPUSHANDGE:

High Condition	Low Condition
A	B	Top
C	D	Next

Stack after IPUSHANDGE:

Bank Selector	Stack Item	High Condition	Low Condition
If Bs3 = 1 (low)	Top	([Rs0].L >= [Rs1].L) & A	([Rs0].L >= [Rs1].L) & B
	Next	C	D
If Bs3 = 2 (high)	Top	([Rs0].H >= [Rs1].H) & A	([Rs0].H >= [Rs1].H) & B
	Next	C	D
If Bs3 = 3 (vector)	Top	([Rs0].H >= [Rs1].H) & A	([Rs0].L >= [Rs1].L) & B
	Next	C	D

Note: [R].X denotes the data on bank X of register R and A, B, C, D take the values TRUE or FALSE.

Microcode Pattern:

Takes 6 cycles to execute.
    Example: IPUSHANDGE 0xFF 3 0xA 0xB

	  
STKC  FLW  IOC  AGU   ASEL BS5 P5 BS4 C4 P4  MPC  BS3 C3 P3 P2 P1 P0
--------------------------------------------------------------------
  -    -    -    -      -   0  00  0   0 00  ISUB  0   0 00 00 0b 0a
  -    -    -    -      -   0  00  0   0 00    -   0   0 00 00 00 00
  -    -    -    -      -   0  00  0   0 00    -   0   0 00 00 00 00
  -    -    -    -      -   0  00  0   0 00    -   0   0 00 00 00 00
  -    -    -    -      -   0  00  0   0 00    -   3   0 ff 00 00 00
PAGE   -    -    -      -   0  00  0   0 00    -   0   0 00 00 00 00

	  

Exceptions :

No exceptions.

Example :

!! Initial conditions:
!! Content of register 0xA:  
!!    [0xA].H = 0xFFFFFFFFFFFFFFFF
!!    [0xA].L = 0xDDDDDDDDDDDDDDDD
!! Content of register 0xB:
!!    [0xB].H = 0xFFFFFFFFFFFFFFFF
!!    [0xB].L = 0xEEEEEEEEEEEEEEEE
!! Top of the stack is: 
!!    H = A, L = B

IPUSHANDGE 255 3 0xA 0xB !! Pushes: High = TRUE & a Low = FALSE & b
IPUSHANDGE 255 2 0xA 0xB !! Pushes: High = TRUE & a Low = TRUE & b
IPUSHANDGE 255 1 0xA 0xB !! Pushes: High = FALSE & a Low = FALSE & b