The HALT instruction stops run-mode execution and raises a
HALT exception for one cycle. It should be noted that the last
value of the AGU is recorded, modulo 256, as a halt code on
configuration register 0x20 (see the exceptions below).
Takes 30 cycles to execute.
Example: HALT
ADDR DISP C5 MCC STKC FLW IOC AGU ASEL
----------------------------------------------------
05F2: 0000000a 0 - - - - E -
05F3: 00000000 0 - - - - - -
05F4: 00000000 0 - - - - - -
05F5: 00000000 0 - - - - - -
05F6: 00000000 0 - - HLT - - -
----------------------------------------------------
— Microcode for the example below.
Configuration Register: 0x20 (CrMemExc)
 |
[0] |
00000000 00000001 |
RO |
HALT |
Raised only for one cycle |
[39:32] |
000000FF 00000000 |
RW |
Halt Code |
By HALT & SEX (even if masked) |
 |
AGU_ED ZERO 0x0000000A
HALT
!! Halts run-mode execution
!! with a halt code of 0xA