The LIRAC instruction (Load Instruction Read Address) writes the IRA
configuration register, if the top of the condition stack is true,
with address taken from the AGU output encoded as follows:
- Bits [11:0] - written to IRA register.
The register contents define the address in Instruction Cache from
which instructions are to be executed. Used by CJMPIF instruction
to perform coditioned jumps in cache.
Instruction is stack conditioned.
Takes 3 cycles to execute.
Example: LIRAC
ASEL STCK
------------
LIRAC POP
- -
- -
NOT YET
Not available at the moment.