Syntax:

• AGU_RXDA DISP32 Rs BS5

Description:

Generates 32-bit address (DISP32), performs a MULA operation with it and the content of register Rs (bank selected by BS5), and adds the current content of the AGU accumulator register. The result is loaded into the AGU accumulator register.

Microcode Pattern:

Takes 5 cycles to execute.
    Example: AGU_RXDA ZERO 5 0xA5

	  
	  DISP    AGU  P5
	-----------------
	00000000   -   A5
	00000000   -   00
	00000005  RXDA 00
	00000000   -   00
	00000000   -   00

	  

Exceptions :

NOT YET

Example :

AGU_RXDA ZERO 10 0x20 
  !! Perform MULA with content of
  !! register 0x20 and address 10
  !! Add content of accumulator to 
  !! MULA result then load the final 
  !! result to AGU accumulator.