Syntax:

• AGU_DRA DISP64 Ra BS5

Description:

Sums the contents of source registers Rs and accumulator and adds generated 64-bit address (displacement) DISP64 to the sum, then loads it into AGU accumulator register. The register Ra is accessed via Port 5, the corresponding bank select is given by BS5.

Note: DISP64 must be always expressed as a pair "SYMBOL IMMEDIATE". More information on this in notations.

Microcode Pattern:

Takes 4 cycles to execute.
    Example: AGU_DRA ZERO 7 0xA5

	  
	 DISP     AGU  P5
	-----------------
	00000000   -   A5
	00000000   -   00
	00000007  DRA  00
	00000000   -   00

	  

Exceptions :

NOT YET

Example :

AGU_DRA ZERO 10 0x20 
  !! Sums the content of register 0x20 with 
  !! content of AGU accumulator. Adds the 
  !! displacement to the result and load it 
  !! to accumulator.